Job Description

Are you passionate about cutting-edge FPGA and embedded system design in the semiconductor industry? We're looking for an experienced FPGA Design Engineer to join our team working on high-performance, real-time signal control systems built on the Xilinx Zynq platform.

Responsibilities:

• Port control logic from existing Visual C++ applications to run on the ARM processor of the Xilinx Zynq SoC.
• Design, implement, and test firmware and hardware components for semiconductor control systems.
• Develop Ethernet-based control protocols to manage FPGA state and parameters (ON/OFF, frequency, magnitude) from a PC interface.
• Implement real-time signal processing algorithms within the FPGA environment.
• Integrate and configure FPGA IP cores such as FIFO buffers, ADC interfaces, and ring memory structures.
• Work closely with the hardware team to validate FPGA-to-hardware interfaces.
• Document architecture, implementation, testing, and user guides to support internal teams and future development.
• Support cross-border engineering efforts, preferably in both English and Japanese.

Qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
• 10+ years of experience in FPGA design within the semiconductor industry.
• Strong expertise in Xilinx FPGAs and the Vivado Design Suite.
• Extensive experience with the Xilinx Zynq platform, including firmware development for ARM cores.
• Proficiency in C/C++ for embedded systems and Visual C++/C# for PC-based control applications.
• Solid understanding of signal processing fundamentals and how they apply to FPGA architectures.
• Experience in Ethernet communication protocols (TCP/UDP) forTCP control and data acquisition.
• Proven ability to work across both hardware and software development boundaries.
• Excellent documentation and debugging skills.
• Japanese language skills is a plus
• Experience with semiconductor test equipment, ATE interfaces, or wafer-level systems.
• Familiarity with real-time operating systems (RTOS) on ARM platforms.
• Knowledge of AXI buses and inter-processor communication in Zynq SoCs.

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